{"id":7980,"date":"2023-07-17T15:01:47","date_gmt":"2023-07-17T07:01:47","guid":{"rendered":"https:\/\/www.huashu-tech.com\/?p=7980"},"modified":"2023-07-17T15:01:47","modified_gmt":"2023-07-17T07:01:47","slug":"new-technology-reduces-30-percent-chip-area-of-stt-mram-while-increasing-memory-bit-yield-by-70-percent","status":"publish","type":"post","link":"https:\/\/www.huashu-tech.com\/vi\/new-technology-reduces-30-percent-chip-area-of-stt-mram-while-increasing-memory-bit-yield-by-70-percent\/","title":{"rendered":"C\u00f4ng ngh\u1ec7 m\u1edbi gi\u1ea3m 30% di\u1ec7n t\u00edch chip c\u1ee7a STT-MRAM trong khi t\u0103ng hi\u1ec7u su\u1ea5t bit b\u1ed9 nh\u1edb l\u00ean 70%"},"content":{"rendered":"
In a world first, researchers from Tohoku University have successfully developed a technology to stack magnetic tunnel junctions (MTJ) directly on the vertical interconnect access (via) without causing deterioration to its electric\/magnetic characteristics. The via in an integrated circuit design is a small opening that allows a conductive connection between the different layers of a semiconductor device.<\/p>\n