{"id":7980,"date":"2023-07-17T15:01:47","date_gmt":"2023-07-17T07:01:47","guid":{"rendered":"https:\/\/www.huashu-tech.com\/?p=7980"},"modified":"2023-07-17T15:01:47","modified_gmt":"2023-07-17T07:01:47","slug":"new-technology-reduces-30-percent-chip-area-of-stt-mram-while-increasing-memory-bit-yield-by-70-percent","status":"publish","type":"post","link":"https:\/\/www.huashu-tech.com\/th\/new-technology-reduces-30-percent-chip-area-of-stt-mram-while-increasing-memory-bit-yield-by-70-percent\/","title":{"rendered":"\u0e40\u0e17\u0e04\u0e42\u0e19\u0e42\u0e25\u0e22\u0e35\u0e43\u0e2b\u0e21\u0e48\u0e0a\u0e48\u0e27\u0e22\u0e25\u0e14\u0e1e\u0e37\u0e49\u0e19\u0e17\u0e35\u0e48\u0e0a\u0e34\u0e1b 30 \u0e40\u0e1b\u0e2d\u0e23\u0e4c\u0e40\u0e0b\u0e47\u0e19\u0e15\u0e4c\u0e02\u0e2d\u0e07 STT-MRAM \u0e43\u0e19\u0e02\u0e13\u0e30\u0e17\u0e35\u0e48\u0e40\u0e1e\u0e34\u0e48\u0e21\u0e1c\u0e25\u0e1c\u0e25\u0e34\u0e15\u0e1a\u0e34\u0e15\u0e2b\u0e19\u0e48\u0e27\u0e22\u0e04\u0e27\u0e32\u0e21\u0e08\u0e33 70 \u0e40\u0e1b\u0e2d\u0e23\u0e4c\u0e40\u0e0b\u0e47\u0e19\u0e15\u0e4c"},"content":{"rendered":"

In a world first, researchers from Tohoku University have successfully developed a technology to stack magnetic tunnel junctions (MTJ) directly on the vertical interconnect access (via) without causing deterioration to its electric\/magnetic characteristics. The via in an integrated circuit design is a small opening that allows a conductive connection between the different layers of a semiconductor device.<\/p>\n

\n
<\/div>\n<\/section>\n

 <\/p>\n

This new discovery will be particularly significant in reducing the chip area of spin-transfer torque magnetic random access\u00a0memory<\/a>\u00a0(STT-MRAM), making its commercialization more practical.<\/p>\n

The team led by Professor Tetsuo Endoh, Director of the Center for Innovative Integrated Electronic Systems (CIES), focused on reducing the memory cell area of STT-MRAMs in order to lower manufacturing costs, making them competitive with conventional semiconductor memories like dynamic\u00a0random access memory<\/a>\u00a0(DRAM).<\/p>\n

Because MTJs use magnetic properties, the quality of the surface between the MTJ and its lower electrode is important. If the surface area is not smooth, the electric\/magnetic characteristics of the MTJ will degrade. For this reason, placing an MTJ directly on the via holes in STT-MRAMs has been avoided until now, although it increases the size of the memory cell.<\/p>\n

Endoh’s group has tackled the issue by developing a special polishing process technology to prevent any interference between the MTJ and its lower electrode. The technology’s effectiveness was successfully verified by an experiment using single-MTJ test chips.<\/p>\n

To further test the success of this development, a 2-Mbit STT-MRAM test chip integrating the new technology has been designed to verify the space needed for the integrated circuits\u2014this includes more than 1million MTJs.<\/p>\n

“Not only does this test chip show a 70% improvement in its memory bit yield compared to standard STT-MRAM, but its memory cell area is reduced by 30%,” says Endoh. “It will be very effective for reducing the chip area of MRAM.”<\/p>\n

CIES develops material, process, circuit and\u00a0test<\/a>\u00a0technologies in integrated electronic systems. The center’s main focus is on developing high-performance, low-power technologies for a more energy-efficient society.<\/p>\n

The results of this research were presented at the IEEE International Memory Workshop in France on May 16, 2016.<\/p>","protected":false},"excerpt":{"rendered":"

In a world first, researchers from Tohoku University have successfully developed a technology to stack magnetic tunnel junctions (MTJ) directly on the vertical interconnect access (via) without causing deterioration to its electric\/magnetic characteristics. The via in an integrated circuit design is a small opening that allows a conductive connection between the different layers of a<\/p>","protected":false},"author":1,"featured_media":7987,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[1],"tags":[],"acf":[],"_links":{"self":[{"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/posts\/7980"}],"collection":[{"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/comments?post=7980"}],"version-history":[{"count":1,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/posts\/7980\/revisions"}],"predecessor-version":[{"id":7988,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/posts\/7980\/revisions\/7988"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/media\/7987"}],"wp:attachment":[{"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/media?parent=7980"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/categories?post=7980"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.huashu-tech.com\/th\/wp-json\/wp\/v2\/tags?post=7980"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}