All players in the semiconductor business benefit from one industry-wide cooperative effort: developing long-range “roadmaps” that chart potential pathways to common technological goals. In the most recent issue of the International Technology Roadmap for Semiconductors, nanomagnetic logic is given serious consideration among a diverse zoo of “emerging research devices.” Magnetic circuits are non-volatile, meaning they don’t need power to remember what state they are in. Extremely low energy consumption is one of their most promising characteristics. They also can operate at room temperature and resist radiation.<\/p>\n
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The potential to pack more gates onto a chip is especially important. Nanomagnetic logic can allow very dense packing, for several reasons. The most basic building blocks, the individual nanomagnets, are comparable in size to individual transistors. Furthermore, where transistors require contacts and wiring, nanomagnets operate purely with coupling fields. Also, in building CMOS and nanomagnetic devices that have the same function \u2013 for example, a so-called full-adder \u2013 it can take fewer magnets than transistors to get the job done.<\/p>\n
Finally, the potential to break out of the 2D design space with stacks of 3D devices makes nanomagnetic logic competitive. TUM doctoral candidate Irina Eichwald, lead author of the\u00a0Nanotechnology<\/i>\u00a0paper, explains: “The 3D majority gate demonstrates that magnetic computing can be exploited in all three dimensions, in order to realize monolithic, sequentially stacked magnetic circuits promising better scalability and improved packing density.”<\/p>\n
“It is a big challenge to compete with silicon CMOS circuits,” adds Dr. Markus Becherer, leader of the TUM research group within the Institute for Technical Electronics. “However, there might be applications where the non-volatile, ultralow-power operation and high integration density offered by 3D nanomagnetic circuits give them an edge.”<\/p>","protected":false},"excerpt":{"rendered":"
Electrical engineers at the Technical University Munich (TUM) have demonstrated a new kind of building block for digital integrated circuits. Their experiments show that future computer chips could be based on three-dimensional arrangements of nanometer-scale magnets instead of transistors. As the main enabling technology of the semiconductor industry \u2013 CMOS fabrication of silicon chips \u2013<\/p>","protected":false},"author":1,"featured_media":7953,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":[],"categories":[1],"tags":[],"acf":[],"_links":{"self":[{"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/posts\/7952"}],"collection":[{"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/comments?post=7952"}],"version-history":[{"count":1,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/posts\/7952\/revisions"}],"predecessor-version":[{"id":7954,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/posts\/7952\/revisions\/7954"}],"wp:featuredmedia":[{"embeddable":true,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/media\/7953"}],"wp:attachment":[{"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/media?parent=7952"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/categories?post=7952"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.huashu-tech.com\/vi\/wp-json\/wp\/v2\/tags?post=7952"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}